Reuse methodology manual for system -on-a-chip designs

The world of chip design has changed significantly since the second edition was published three years ago. In that time, silicon technology has gone through two generations, multi-million gate chips have gone from fringe to mainstream, and SoC has gone from the exotic to commonplace. At the same time, the world of reuse has changed as well, prompting us to develop the third edition. From the perspective of 2002, many of the statements we made in 1999
now seem dated. Upon re-reading the second edition, it was obvious that the RMM needed to be updated with the many of the lessons learned in the last few years. In one sense, though, the biggest change we have made in the RMM is also the biggest change we have seen in reuse in the last three years. Basically, we have changed the tense from future to present. Reuse is no longer a proposal; it is a solution practiced today by many, many chip designers. Likewise, the RMM is no longer aimed at promoting reuse, but describing changes in methodology for practising it. The RMM is now a chronicle of the best practices used by the best teams to develop reusable IP, and to use IP in SoC designs.